1. Field of Invention
This invention generally pertains to methods and devices for amplifying a signal. In certain aspects, it relates to power amplifiers and amplifier systems working at radio frequencies (RF) or higher. Applications include, but are not limited to, wireless systems, microwave components, power amplifiers, CMOS amplifiers, driver amplifiers, and portable electronics.
2. Discussion of Related Art
A common problem in power amplifier (PA) design is dealing with the breakdown limitations of the device technology. Most techniques for power amplification produce a peak voltage on the terminals of the device between two and four times the supply voltage. It is often desirable to tune the amplifier to create a peak voltage as high as possible to improve the efficiency of the amplifier. However, this peak voltage must stay well below the breakdown limits of the device technology. This creates a problem for technologies such as CMOS which have very low breakdown voltages. For example, in a wireless handset the supply voltage can be nominally 3.5V and the peak voltage for an efficient amplifier can be at least 7.0V. A 0.5 um CMOS process typically only has a breakdown voltage of 5.0V, making the technology unsuitable for the application.
A second problem can arise when a power amplifier is used to drive an antenna or other uncontrolled load impedance. In the case of an antenna, the PA might see a load impedance that varies by a factor of as much as ten. This can cause the PA to deviate from its nominal class of operation and produce peak voltages significantly higher than planned. For this reason, it may be desirable to use a device technology with a breakdown voltage of greater than four to five times the supply voltage.
Several techniques have been employed in the industry to avoid these problems. Multiple cascade stages have been used to reduce the voltage across any one transistor. Amplifiers can also be implemented in series with the supply to divide the voltage swing across two or more sets of transistors. Either of these techniques can solve the first problem but will struggle with the second issue of load tolerance. A DC-DC converter can also be used to control the supply voltage. However, this will have a significant impact on the cost of the system and may also struggle with the second problem.
Push-pull class D amplifiers have the advantage of keeping the voltage at or below the supply voltage for all conditions. While this solves the two major problems discussed, they have poor DC to RF conversion efficiency at RF frequencies. This is because the output capacitance of the two devices must be discharged each time the amplifier switches state. The resulting power loss is 2·π·F·Cout·(VSW)2, where F is the switching frequency, Cout is the output capacitance and VSW is the voltage across a switch upon switching. This power loss is proportional to the switching frequency, F, and is unacceptably high at RF for most commercially available device technologies.
One variant of this technique that retains the advantage of low peak voltages while producing high efficiency is the class DE amplifier. This was first suggested by Zhukov and Kozyrev in 1975. Its most widespread use has been for rectifiers for DC converters. The basic idea is to improve the efficiency of a class D push-pull amplifier by controlling the switching duty of the two devices. Typically, the biggest source of power loss in a push-pull amplifier at RF is the energy that is dissipated while charging the output capacitance of the devices during transitions. FIG. 1a shows a push-pull amplifier with the devices drawn as ideal switches with parasitic output capacitance. As the bottom switch transitions from the off state to the on state, it must discharge the full supply voltage present at its drain. Since these losses can be incurred in each cycle, the overall power dissipation caused by the bottom switch is 0.5·ω·Cn·(Vsup)2(where ω=2·π·F, Cn is the parasitic output capacitance of the bottom switch, and Vsup is the supply voltage). A similar loss of 0.5·ω·CP·(Vsup)2 is incurred during the transition of the top switch. The total power loss incurred by both switches is thus represented by ω·(Cn+Cp)V2=ω·Cout·(Vsup)2. At RF frequencies this can be a significant loss in power and efficiency. The class DE amplifier can overcome this problem by switching the devices with independent signals and creating a period of time where both transistors are simultaneously off. A tuned output network can be used to provide the current necessary to discharge the output capacitance before the switch turns on. The class E condition of zero-voltage with zero-slope switching can be imposed to realize high efficiency. Efficiencies can be obtained that rival or surpass the techniques previously discussed while maintaining a peak voltage that is no greater than the supply voltage. Moreover, this circuit can be designed such that the peak voltage will never be higher than the supply, even under VSWR (Voltage Standing Wave Ratio) mismatch conditions. The penalties for this advantage can include a lower power density (a by-product of the lower peak voltage) and a more complex input drive. The low gain of most devices at RF and the complexity of the system have made realizing a class DE amplifier impractical at RF frequencies.